The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.
Network devices such as network switches, routers, edge devices and the like often employ store and forward architectures in which received packets are stored in memory for subsequent transmission to desired destinations after processing. Such devices sometimes employ external memory for storing the received packets. In such devices, it is very important to efficiently manage memory available to the network device to store packet data in the external memory without significant memory waste, and to thereafter retrieve the data from the memory without introducing any significant latency to the network traffic flowing through the network device.